Ultra-Low Power, Highly Reliable, and Nonvolatile Hybrid MTJ/CMOS Based Full-Adder for Future VLSI Design - 2017 PROJECT TITLE :Ultra-Low Power, Highly Reliable, and Nonvolatile Hybrid MTJ/CMOS Based Full-Adder for Future VLSI Design - 2017ABSTRACT:Very giant-scale integrated circuit style, based mostly on today's CMOS technologies, are facing various challenges. Shrinking transistor dimensions, reduction in threshold voltage, and lowering power offer voltage, cause new issues like high leakage current, and increase in radiation sensitivity. As a resolution for such design challenges, hybrid MTJ/CMOS based mostly design will resolve the issue of leakage power and bring the advantage of nonvolatility. However, radiation-induced soft error continues to be an issue in such new designs as they need peripheral CMOS elements. Therefore, these magnetic-based circuits are still susceptive to radiation effects. This paper proposes a radiation hardened and low power magnetic full-adder (MFA) for advanced microprocessors. Comparing with the previous work, the proposed MFA is capable of tolerating any particle strike irrespective of the induced charge. Besides, our MFA circuit offers a lower energy consumption in write operation as compared with previous counterparts. We tend to conjointly suggest an incremental modification to the proposed MFA circuit to allow it the advantage of full nonvolatility for future nonvolatile microprocessors. Did you like this research project? To get this research project Guidelines, Training and Code... Click Here facebook twitter google+ linkedin stumble pinterest VLSI HSPICE MTech Projects 10T SRAM Using Half-VDD Precharge and Row-Wise Dynamically Powered Read Port for Low Switching Power and Ultralow RBL Leakage - 2017 Sense Amplifier Half-Buffer (SAHB): A Low-Power High-Performance Asynchronous Logic QDI Cell Template - 2017